1. Field of the Invention
The present invention relates to an EEPROM having a multiplicity of memory cells which are disposed in a memory cell array and can be addressed by word, bit and source lines for writing, reading out and erasing. The present invention also relates to a method of driving an EEPROM.
EEPROMs and methods of driving the same for writing in, reading out and erasing data have long been known and are used to an increasing extent.
A practical example of the structural layout and driving of a conventional EEPROM is explained below with reference to FIGS. 2 and 3.
The conventional EEPROM which is described has a multiplicity of memory cells that are disposed in a memory cell array and can be addressed through the use of respective word, bit and source lines.
EEPROMs constructed in such a way are increasingly used in chip cards having a memory content which has to be updated on specific occasions to correspond to changes that have occurred in the meantime (for example the charge meter of a phone card).
Such updates require an erasing and subsequent overwriting of memory areas of the EPROM.
The effort required therefor is disproportionately great, in particular in the very frequent case in which only small amounts of data have to be updated and, unless additional security precautions are taken, it cannot entirely be ruled out that, under certain circumstances, the desired update is not executed properly if there is an unfortunate coincidence of rare exceptional conditions.